https://github.com/wanchope/riscv_sim

simulate the RSIC-V core to run with the binary file.
https://github.com/wanchope/riscv_sim

go risc-v simulation

Last synced: 28 days ago
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simulate the RSIC-V core to run with the binary file.

• Host: GitHub
• URL: https://github.com/wanchope/riscv_sim
• Owner: wanchope
• License: apache-2.0
• Created: 2019-05-17T07:16:01.000Z (over 5 years ago)
• Default Branch: master
• Last Pushed: 2019-05-27T03:23:54.000Z (over 5 years ago)
• Last Synced: 2024-08-03T23:27:00.703Z (4 months ago)
• Topics: go, risc-v, simulation
• Language: Go
• Size: 12.7 KB
• Stars: 1
• Watchers: 2
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

Awesome Lists containing this project

• awesome-golang-repositories - riscv_sim - V core to run with the binary file. (Repositories)

README

        
# riscv_sim

Simulate the RISC-V core to run with the binary file.

#What to do?

This project will support following functions:

1. Recognize the instruction, identify the illegal instruction.

2. Easy to support new instructions and user defined instructions.

3. Run as a RISC-V based core.

4. Run with some sample peripherals, such as UART and interrupt.

5. Build a unit test framework to test the software with the binary file compiled by RISC-V compiler.

#Why use GO langue?

1. Use goroutine could easily simulate the interrupt and peripherals.

2. The GO langue is very similar with the C langue, easy to add new instructions by C programmers.

3. Easy to do the uint test.

#Unit test

Use GoConvey to support Go's native testing package.

get GoConvey as follow:

	go get github.com/smartystreets/goconvey

run the goconvey.exe in this directory, then open browser to localhost:8080, tests will be run and

we can get the coverage.