https://github.com/xilinx/vitis_accel_examples

Vitis_Accel_Examples
https://github.com/xilinx/vitis_accel_examples

acap alveo fpga-programming soc vitis xilinx zynq

Last synced: 2 months ago
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Vitis_Accel_Examples

• Host: GitHub
• URL: https://github.com/xilinx/vitis_accel_examples
• Owner: Xilinx
• License: mit
• Created: 2019-10-13T20:04:24.000Z (about 6 years ago)
• Default Branch: main
• Last Pushed: 2025-08-15T21:12:05.000Z (4 months ago)
• Last Synced: 2025-08-15T23:36:21.600Z (4 months ago)
• Topics: acap, alveo, fpga-programming, soc, vitis, xilinx, zynq
• Language: Makefile
• Homepage: http://xilinx.github.io/Vitis_Accel_Examples/
• Size: 107 MB
• Stars: 555
• Watchers: 23
• Forks: 221
• Open Issues: 10
• Metadata Files:
  • Readme: README.md
  • Contributing: CONTRIBUTING.md
  • License: LICENSE.txt

Awesome Lists containing this project

README

          

 

    
Vitis™ Data Center Acceleration Examples

    

 


Welcome to the Vitis Data Center Acceleration Examples repository. This repository contains examples to showcase various features of the Vitis™ tools targeting Alveo Data Center platforms. It is expected that users have gone through the [Vitis HLS Introductory Examples](https://github.com/Xilinx/Vitis-HLS-Introductory-Examples) and [Vitis Tutorials](https://github.com/Xilinx/Vitis-Tutorials) and have developed a basic understanding of the tools and the programming model. This repository illustrates specific scenarios related to host code and kernel programming through small working examples. The intention is for users to be able to use these working examples as a reference while developing their own accelerator application based on AMD Alveo platforms. 

## Brief description of the examples

| Example | Description |

|-|-|

| host_xrt | XRT Native APIs examples for optimal host-kernel interaction with AMD Devices |

| performance |Examples that cover performance related aspects for kernel-to-memory, host-to-kernel and host-to-memory |

| rtl_kernels |RTL Kernels based examples covering mix of RTL and HLS C++ kernels and hardware debug in Vitis flow |

| sys_opt | Examples covering multiple devices, multiple processes and kernel swap use cases |

For more comprehensive documentation, 

## NOTE

Software Emulation is not supported for the examples and will be deprecated in the tool in 2024.2. This feature will be removed in the subsequent release.

For more details, please visit https://support.xilinx.com/s/article/000036790?language=en_US

Copyright © 2020–2023 Advanced Micro Devices, Inc


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