https://github.com/ZipCPU/zipcpu

A small, light weight, RISC CPU soft core
https://github.com/ZipCPU/zipcpu

cpu cross-compiler fpga risc-cpu soft-core verilator verilog wishbone wishbone-bus zipcpu

Last synced: about 1 month ago
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A small, light weight, RISC CPU soft core

• Host: GitHub
• URL: https://github.com/ZipCPU/zipcpu
• Owner: ZipCPU
• Created: 2016-09-21T18:45:32.000Z (almost 8 years ago)
• Default Branch: master
• Last Pushed: 2024-06-07T13:47:35.000Z (3 months ago)
• Last Synced: 2024-06-17T15:51:37.088Z (3 months ago)
• Topics: cpu, cross-compiler, fpga, risc-cpu, soft-core, verilator, verilog, wishbone, wishbone-bus, zipcpu
• Language: Verilog
• Homepage:
• Size: 259 MB
• Stars: 1,216
• Watchers: 61
• Forks: 150
• Open Issues: 4
• Metadata Files:
  • Readme: README.md

Awesome Lists containing this project

• ASIC-Design-Roadmap - zipcpu - with detailed comments. (Projects and IPs / Information Technology)
• awesome-digital-ic - zipcpu - with detailed comments. (Projects and IPs / Information Technology)