Quora Topics

• verilog - Here are 2,566 public repositories matching "verilog" topic...
• vhdl - Here are 1,766 public repositories matching "vhdl" topic...
• fpga - Here are 3,136 public repositories matching "fpga" topic...

• Awesome Electronics - electronics) - A curated list of awesome resources for electronic engineers and hobbyists.
• FPGA Tutorial - A curated list of amazingly FPGA tutorials and projects.
• Awesome Hardware Description Languages - hdl) - A curated list of amazingly awesome hardware description language projects.
• Awesome FPGA - fpga) - A collection of resources on FPGA devices and development in general.
• Open Hardware Verification - marshall/awesome-open-hardware-verification) - A curated List of Free and Open Source hardware verification tools and frameworks.
• Awesome Open Source EDA Projects - eda) - A curated list of EDA open source projects.
• List of FPGA boards - fpga-boards) - List of Repurposed FPGA boards.
• awesome-hwd-tools - hwd-tools) - A curated list of awesome open source hardware design tools with a focus on chip design.
• Awesome Lattice FPGA boards - latticeFPGAs) - A curated list of awesome open-source FPGA boards

FPGA

• EETOP - The most popular IC bbs in China.
• edaboard - An EE World Online Resource.
• 极术社区 - A bbs sponsered by Arm China.

Mobile Phone

• 与门 - Build an adder from nand.
• 与门 - Build an adder from nand.

PC

• MHRD - Become a hardware engineer & Build your own CPU from NAND.

web

• NAND Game - Build a CPU from basic cells by dragging.

FPGA

• HDL bits - A collection of small circuit design exercises for practicing digital hardware design using Verilog Hardware Description Language (HDL).
• USTC Verilog OJ - A verilog online judge service
• nowcoder - Verilog Part - A verilog oj platform.
• USTC Verilog OJ - A verilog online judge service

Communication Technology

• ALEX FORENCICH - Verilog IPs including PCIe/Ethernet/I2C/Uart etc.
• C910 - UART
• ALEX FORENCICH - AXI - axi) - Collection of AXI4 and AXI4 lite bus components. Most components are fully parametrizable in interface widths.
• TVIP - AXI - ishitani/tvip-axi) - An UVM package of AMBA AXI4 VIP.
• PULP-platform - AXI - platform/axi) - AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication.
• ALEX FORENCICH - AXIS - axis) - Collection of AXI Stream bus components. Most components are fully parametrizable in interface widths.
• ALEX FORENCICH - IIC - i2c) - I2C interface components. Includes full MyHDL testbench with intelligent bus cosimulation endpoints.
• corundum - NIC
• RIFFA - PCIe - Reusable Integration Framework for FPGA Acceleratorscommunication.
• zipcpu - UART - A simple, basic, formally verified UART controller.
• ALEX FORENCICH - Verilog IPs including PCIe/Ethernet/I2C/Uart etc.
• ALEX FORENCICH - UART - uart) - A basic UART to AXI Stream IP core, written in Verilog with cocotb testbenches.

Information Technology

• RISC-V Exchange: Cores & SoCs - A list of RICS-V cores and SoCs.
• openmsp430 - The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.
• RISC-V Instruction Set Manual - This repository contains the LaTeX source for the draft RISC-V Instruction Set Manual.
• PULP - Open source Parallel Ultra-Low-Power RISC-V core.
• XiangShan - Open-source high-performance RISC-V processor.
• picorv32 - A Size-Optimized RISC-V CPU.
• Hummingbirdv2 E203 Core and SoC - mcu/e203_hbirdv2) [Docs](https://doc.nucleisys.com/hbirdv2/) - A Ultra-Low Power RISC-V Core.
• darkriscv - A proof of concept for the opensource RISC-V instruction set.
• CVA6 RISC-V CPU - An application class 6-stage RISC-V CPU capable of booting Linux.
• VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation.
• zipcpu - with detailed comments.
• Nyuzi Processor - GPGPU microprocessor architecture.
• openc910 - head-Semi/openc910) - OpenXuantie C910 Core.
• riscv-starship - zju/riscv-starship) - Run rocket-chip on FPGA(Xilinx Virtex-7 VC707).
• Wujian100 - head-Semi/wujian100_open) - A MCU base SoC.
• RISC-V Exchange: Cores & SoCs - A list of RICS-V cores and SoCs.

Quora Topics

• OpenCores - Free and open source IP cores.
• FreeCores - A home for open source hardware cores, a fork of almost all cores that was once on OpenCores.org.
• fpga4fun - Some projects build on FPGA.
• Must-have verilog systemverilog modules - A collection of verilog systemverilog synthesizable modules.
• FreeCores - A home for open source hardware cores, a fork of almost all cores that was once on OpenCores.org.
• 32 Verilog Mini Projects - Verilog-Mini-Projects) - 32 useful mini verilog projects for beginners.
• 32 Verilog Mini Projects - Verilog-Mini-Projects) - 32 useful mini verilog projects for beginners.

FPGA

• EDA Playground - Edit, save, simulate, synthesize SystemVerilog, Verilog, VHDL and other HDLs from your web browser.
• WaveDrom - Digital Timing Diagram everywhere
• Icarus Verilog - A Verilog simulation and synthesis tool.
• OpenROAD - OpenROAD-Project/OpenROAD) - An RTL-to-GDS Flow
• tree-core-ide - cpu/tree-core-ide)- A VSCode-based HDL extension.
• GTKWave - GTKWave is a fully featured GTK+ based wave viewer.

Build a CPU

• nand2tetris - Build an advanced computer from nand gate.
• Building a RISC-V CPU Core - edX - Build a RISC-V cpu core. No prior knowledge of digital logic design is required.
• Build a Modern Computer from First Principles: From Nand to Tetris - coursera - Build a modern computer system.
• RISC-V Guide - V-Guide) - A guide covering the RISC-V Architecture.
• ARM Guide - Guide) - A guide covering ARM architecture.

FPGA

• Complex Programmable Logic Device (CPLD) Guide - Guide) - A guide covering CPLD.

HDL

• Verilog TUTORIAL for beginners - A tutorial based upon free Icarus Verilog compiler.
• ChipVerify: Verilog Tutorial - A guide for someone new to Verilog.
• Verilog Tutorial - 菜鸟教程 - Advanced tutorial for verilog.
• Learning Chisel and Scala Part I - Chisel-and-Scala-Part-II/) 🚩📍[Github](https://github.com/VVViy/VVViy.github.io) - A tutorial for chisel, no scala knowledge required.
• Chisel/FIRRTL - lang.org/chisel3/docs/introduction.html) 📍[Github](https://github.com/chipsalliance/chisel3) - Scala based HDL.
• 从 Verilog 到 SpinalHDL - A website navigation for SpinalHDL.
• SpinalHDL - Scala based HDL.
• Verilog TUTORIAL for beginners - A tutorial based upon free Icarus Verilog compiler.
• Verilog/SystemVerilog Guide - SystemVerilog-Guide) - A guide covering Verilog & SystemVerilog.
• VHDL Guide - Guide) - A guide covering VHDL.

Information Technology

• zipcpu - Verilog, Formal Verification and Verilator Beginner's Tutorial
• WORLD OF ASIC - A great source of detailed VLSI tutorials and examples.
• zipcpu - Verilog, Formal Verification and Verilator Beginner's Tutorial
• WORLD OF ASIC - A great source of detailed VLSI tutorials and examples.

Verification

• Verification Academy - The most comprehensive resource for verification training.
• Verification Guide - Tutorials with links to example codes on EDA Playground.
• Doulos - Global training solutions for engineers creating the world's electronics products.
• testbench - Some training articals for systemverilog.
• ClueLogic - Providing the clues to solve your verification problems.
• ChipVerify - A simple and complete set of verilog/System Verilog/UVM tutorials.
• testbench - Some training articals for systemverilog.