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Projects in Awesome Lists tagged with logic-synthesis

A curated list of projects in awesome lists tagged with logic-synthesis .

https://github.com/lsils/lstools-showcase

Showcase examples for EPFL logic synthesis libraries

examples logic-synthesis

Last synced: 25 Oct 2024

https://github.com/lnis-uofu/LSOracle

IDEA project source files

logic-synthesis

Last synced: 25 Oct 2024

https://github.com/msoeken/kitty

C++ truth table library

algorithms boolean-function logic-synthesis

Last synced: 19 Dec 2024

https://github.com/The-OpenROAD-Project/yosys

Logic synthesis and ABC based optimization

brown-university logic-synthesis physical-synthesis

Last synced: 20 Nov 2024

https://github.com/hriener/lorina

C++ parsing library for simple formats used in logic synthesis and formal verification

logic-synthesis parsing-library

Last synced: 18 Dec 2024

https://github.com/hriener/easy

C++ header-only ESOP library

boolean-function esop-forms logic-synthesis xor

Last synced: 21 Oct 2024

https://github.com/porglezomp/minecraft-eda

Electronic design automation for Minecraft

eda logic-synthesis minecraft place-and-route pnr

Last synced: 02 Nov 2024

https://github.com/porglezomp/nangate

Yosys passes to syntheize to NaN gates (à la http://tom7.org/nand/)

logic-synthesis nan-gate verilog yosys yosys-plugin

Last synced: 27 Oct 2024

https://github.com/boschmitt/exorcism

Fast Heuristic Minimization of Exclusive-Sums-of-Products

logic-minimization logic-synthesis

Last synced: 20 Nov 2024

https://github.com/boschmitt/losys

Logic synthesis and verification framework

logic-gates logic-minimization logic-synthesis

Last synced: 20 Nov 2024

https://github.com/hriener/aig

C++ header-only And-Inverter graph (AIG) library

logic-gates logic-optimization logic-synthesis verification

Last synced: 08 Dec 2024

https://github.com/reity/article-permutation-circuit-synthesis

This article describes how embedded languages and recursion can be used to create a tool that synthesizes a relatively efficient logical circuit for any chosen permutation of the set of all bit vectors of some fixed length.

article circuit-optimizaion logic-circuit logic-synthesis python

Last synced: 23 Nov 2024

https://github.com/kevin-pottier/socn

Design and implementation of an ASIC with an 8051 microcontroller core. Includes VHDL modules, C applications, RTL simulations, and mixed-signal validation. Focused on hardware-software co-design and optimization.

8051-architecture asic-design digital-circuit-optimization embedded-systems hardware-software-co-design logic-synthesis microcontroller-integration mixed-signal-simulation rtl-simulation vhdl

Last synced: 15 Dec 2024

https://github.com/snowkylin/npn

A boolean matcher that computes the NPN canonical representative for a given boolean function.

boolean-matcher cpp eda logic-synthesis npn pypi-package python

Last synced: 15 Nov 2024