Projects in Awesome Lists tagged with charge-pump
A curated list of projects in awesome lists tagged with charge-pump .
https://github.com/lakshmi-sathi/avsdpll_1v8
8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x multiplied clock at ~50% duty cycle on tt corner at room temperature.
analog-circuit asic charge-pump clock-multiplier ic intellectual-property manufacturable phase-detector pll rtl2gds
Last synced: 20 Nov 2024
https://github.com/ranjith-dhananjaya/20ghz-integer-n-pll-in-65nm-cmos-process
Design of a frequency synthesizer to generate the 20 GHz output signal from 100 MHz input using 𝑉𝐷𝐷 of 1.2V in Cadence 65nm CMOS process
analog capacitor charge-pump design frquency-divider ic-design-project inductor locking pfd pll vco
Last synced: 24 Feb 2025
