https://github.com/mummanajagadeesh/4-bit-ripple-carry-adder

VLSI test project: 4-bit ripple carry adder with random stuck-at fault injection. Supports ATPG-based verification, fault modeling, and simulation for learning and experimentation

atpg fault-modeling hdl icarus simulation stuck-at-faults testing verilog vlsi vlsi-testing vlsi-verification

Last synced: 04 Oct 2025