Ecosyste.ms: Awesome

https://github.com/soumyadip007/vhdl-modelsim-altera-simulator-coa

VHDL (VHSIC Hardware Description Language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can also be used as a general purpose parallel programming language.

computerarchitecture simulation vhdl-code

Last synced: 09 Nov 2024

https://github.com/skylightqp/school-life

학교에서 배운 내용을 정리합니다.

computerarchitecture programming school-education

Last synced: 08 Nov 2024

https://github.com/a19hu/mips_compiler

Mips Compiler

compiler computerarchitecture mips-assembly rust

Last synced: 14 Dec 2024

https://github.com/francoriba/alu-uart-basys3

UART modules interface using Verilog for the Basys3 board (Digilent). Computer Architecture 2023. FCEFyN, UNC, Argentina

arquitectura-de-computadores basys3-fpga computerarchitecture fcefyn hardwaredescription uart unc verilog

Last synced: 12 Nov 2024

https://github.com/mrummanhasan/study_material-computer_architecture

computer computerarchitecture cpu memory-management

Last synced: 12 Nov 2024

https://github.com/shoaib1522/digital-logic-design

A comprehensive repository for mastering Digital Logic Design, featuring HDL implementations of the Hack computer, assembler projects, lecture slides, lab assignments, and essential resources for understanding hardware and computer architecture.

asm assembler-implementation computerarchitecture digital hackcomputer hdl logic-programming mano morris python

Last synced: 22 Dec 2024