Projects in Awesome Lists tagged with memory-design
A curated list of projects in awesome lists tagged with memory-design .
https://github.com/akhilrai28/single-port-ram
This project implements a single-port RAM using Verilog. The design simulates a memory module with a single read/write port, supporting basic memory operations like data storage and retrieval. It includes testbenches for functional verification and timing analysis to ensure reliable operation.
digital-circuits fpga fpga-programming hardware hardware-description-language memory-design ram single-port synchronous testbench verilog
Last synced: 06 Feb 2026
https://github.com/pranavh-2004/64kb_ram_iverilog
PESU Sem 3: Mini project for Digital Design and Computer Organization
digital-design-and-computer-organization hdl memory-design modular-design ram verilog
Last synced: 03 Feb 2026
