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Projects in Awesome Lists tagged with migen

A curated list of projects in awesome lists tagged with migen .

https://github.com/rprinz08/hbpf

hBPF = eBPF in hardware

ebpf fpga litex migen python3

Last synced: 16 Dec 2024

https://github.com/quartiq/bscan_spi_bitstreams

FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.

fpga migen

Last synced: 09 Nov 2024

https://github.com/jc-ll/ruby_rtl

Describing RTL circuit in Ruby

digital-circuits dsl hdl migen vhdl

Last synced: 15 Dec 2024

https://github.com/quartiq/fastino

Gateware and software for Fastino (32 channel 2.5 MS/s 16 bit DAC for the Sinara ecosystem)

artiq dsp fpga migen sinara-hw

Last synced: 09 Nov 2024

https://github.com/quartiq/urukul

CPLD gateware for the Sinara Urukul module

artiq cpld fpga migen sinara-hw

Last synced: 09 Nov 2024

https://github.com/bucknalla/warc_fusesoc

WARC Open Fusesoc Cores Repository

hls ip migen open-cores verilog

Last synced: 11 Nov 2024

https://github.com/quartiq/mirny

CPLD gateware for the Sinara Mirny module.

artiq cpld fpga migen sinara-hw

Last synced: 09 Nov 2024