Projects in Awesome Lists tagged with netlist-parser
A curated list of projects in awesome lists tagged with netlist-parser .
https://github.com/byuccl/spydrnet
A flexible framework for analyzing and transforming FPGA netlists. Official repository.
cad circuit circuit-analysis circuit-design circuits computer-aided-design digital eda edif electronic-design-automation fpga fpgas hardware hardware-designs netlist netlist-parser netlists transformation transformations
Last synced: 11 May 2025
https://byuccl.github.io/spydrnet/
A flexible framework for analyzing and transforming FPGA netlists. Official repository.
cad circuit circuit-analysis circuit-design circuits computer-aided-design digital eda edif electronic-design-automation fpga fpgas hardware hardware-designs netlist netlist-parser netlists transformation transformations
Last synced: 15 Mar 2025
https://github.com/arasgungore/netlist-solver
A MATLAB project that uses modified nodal analysis to calculate the node voltages of any analog circuit.
algorithm algorithms analog-design circuit circuit-analysis circuit-simulation circuit-simulator circuit-theory circuits circuits-simulator matlab mna modified-nodal-analysis modified-node-analysis netlist netlist-parser netlist-simulator netlists nodal-analysis node-analysis
Last synced: 12 Apr 2025
https://github.com/gabrielseibel1/bins
BINS Is Not SPICE: a SPICE-inspired circuit simulator.
circuit-simulator netlist-parser spice
Last synced: 20 Feb 2025
