Projects in Awesome Lists by openhwgroup
A curated list of projects in awesome lists by openhwgroup .
https://github.com/openhwgroup/cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
ariane asic cpu fpga risc-v rv64gc systemverilog-hdl
Last synced: 13 May 2025
https://github.com/openhwgroup/cv32e40p
CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
Last synced: 16 Feb 2026
https://github.com/openhwgroup/core-v-verif
Functional verification project for the CORE-V family of RISC-V cores.
risc-v systemverilog uvm verification
Last synced: 15 May 2025
https://github.com/openhwgroup/cvfpu
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
Last synced: 27 Jan 2026
https://github.com/openhwgroup/cvw
CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
Last synced: 13 Apr 2025
https://github.com/openhwgroup/force-riscv
Instruction Set Generator initially contributed by Futurewei
Last synced: 06 Apr 2025
https://github.com/openhwgroup/cv32e40x
4 stage, in-order, compute RISC-V core based on the CV32E40P
Last synced: 26 Jan 2026
https://github.com/openhwgroup/programs
Documentation for the OpenHW Group's set of CORE-V RISC-V cores
Last synced: 27 Jan 2026
https://github.com/openhwgroup/core-v-mcu
This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
microcontroller openhwgroup riscv systemverilog
Last synced: 22 Jan 2026
https://github.com/openhwgroup/cv32e40s
4 stage, in-order, secure RISC-V core based on the CV32E40P
Last synced: 27 Jan 2026
https://github.com/openhwgroup/cva5
The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.
Last synced: 31 Jan 2026
https://github.com/openhwgroup/cv-hpdcache
RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores
Last synced: 18 Feb 2026
https://github.com/openhwgroup/cva6-sdk
CVA6 SDK containing RISC-V tools and Buildroot
Last synced: 24 Jan 2026
https://github.com/openhwgroup/core-v-xif
RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions
Last synced: 23 Jan 2026
https://github.com/openhwgroup/cve2
The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH Zurich and Ibex work from lowRISC.
Last synced: 11 May 2025
https://github.com/openhwgroup/cv32e41p
4 stage, in-order, secure RISC-V core based on the CV32E40P with Zfinx and Zce ISA extentions
Last synced: 22 Apr 2025
https://github.com/openhwgroup/core-v-mcu-uvm
CORE-V MCU UVM Environment and Test Bench
Last synced: 21 Jan 2026
https://github.com/openhwgroup/tristan-isolde-unified-access-page
Unified Access Page for the TRISTAN project
Last synced: 17 Feb 2026
https://github.com/openhwgroup/openhwgroup.org
OpenHW Group is a not-for-profit, global organization driven by its members and individual contributors where hardware and software designers collaborate in the development of open-source cores, related IP, tools and software. OpenHW provides an infrastructure for hosting high quality open-source HW developments in line with industry best practices.
Last synced: 07 Apr 2025
https://github.com/openhwgroup/core-v-mcu-devkit
This is the CORE-V MCU DevKit project, hosting the open-source artifacts for the CORE-V MCU Development Kit.
Last synced: 28 Feb 2026
https://github.com/openhwgroup/core-v-sw
Main Repo for the OpenHW Group Software Task Group
Last synced: 21 Jan 2026
https://github.com/openhwgroup/cvw-arch-verif
The purpose of the repo is to support CORE-V Wally architectural verification
Last synced: 14 Feb 2026
https://github.com/openhwgroup/riscv_vm
Instructions to import Ubuntu guest Virtual Machine for RISC-V development for the VEGA board
Last synced: 14 Mar 2025
https://github.com/openhwgroup/cv32e40x-dv
CV32E40X Design-Verification environment
Last synced: 07 Apr 2025
https://github.com/openhwgroup/cva6-platform
CVA6-platform is a multicore CVA6 with CV-MESH software and regression platform
Last synced: 13 Apr 2025
https://github.com/openhwgroup/cv-hpdcache-verif
Verification environment for the OpenHW Group's CORE-V High Performance Data Cache controller.
Last synced: 22 Jan 2026
https://github.com/openhwgroup/core-v-mcu-cli-test
Eclipse/FreeRTOS/core-v-mcu example program
Last synced: 12 Aug 2025
https://github.com/openhwgroup/obi
Repository that maintain the OpenBus Interface spec
Last synced: 14 Feb 2026
https://github.com/openhwgroup/advanced-riscv-verification-methodologies
Advanced Verification Methodologies for RISC-V and related IP
Last synced: 23 Jan 2026
https://github.com/openhwgroup/cvfpu-uvm
UVM Verification Environment for the CVFPU
Last synced: 12 Oct 2025
https://github.com/openhwgroup/u-boot
Unofficial development fork of U-Boot
Last synced: 07 Apr 2025
https://github.com/openhwgroup/cva6-dcls
Dual-Core-Lock-Step platform for the CVA6 RISC-V processor core
Last synced: 31 May 2026
https://github.com/openhwgroup/downloads.openhwgroup.org
downloads.openhwgroup.org
Last synced: 20 Jan 2026
https://github.com/openhwgroup/infra
Issues related to the OpenHW Group infra (GtHub, Mattermost, ...)
Last synced: 19 Mar 2026
https://github.com/openhwgroup/osdforum.org
The Open Source Developer Forum is a workshop that brings open source software and hardware (chips, boards and systems) developers together to collaborate and learn.
Last synced: 07 Apr 2025
https://github.com/openhwgroup/cv32e40s-dv
CV32E40S Design-Verification environment
Last synced: 02 Jul 2025
https://github.com/openhwgroup/core-v-mcu-sdk-examples
Example SDK applications for DevKit
Last synced: 13 Apr 2025
https://github.com/openhwgroup/cv32e40p-dv-review
CV32E40P DV environment based on cv32e20-dv
Last synced: 31 May 2026