Ecosyste.ms: Awesome
An open API service indexing awesome lists of open source software.
awesome-eda
https://github.com/clin99/awesome-eda
- ngspice
- xyce
- Hierarchical Asynchronous Circuit Kompiler Toolkit
- Berkeley-abc
- CVC4
- Galois Parallel Framework
- Asynchronous Circuit Compiler
- PyMTL: Python-based hardware modeling framework
- Yosys Open SYnthesis Suite
- Verilog to Routing -- Open Source CAD Flow for FPGA Research
- Qrouter
- Graywolf
- Limbo
- OpenTimer: A High-performance Timing Analysis Tool for VLSI Systems
- Ophidian: Open-Source Library for Physical Design Research and Teaching.
- OpenMPL
- A Modeling and Verification Platform for SoCs using ILAs
- Mixed Hardware/Software Emulation
- SystemC TLM Interfaces
- BoxRouter (Global Router)
- Rsync
- Cloud-V
- HAMMER:Highly Agile Masks Made Effortlessly from RTL
- Magic
- GDS Viewer
- Lgraph: Live Graph infrastructure for Synthesis and Simulation
- OpenPiton
- Cpp-Taskflow
- Parser-SPEF
- DATCRobustDesignFlow
- EPFLLogicSynthesisLibraries
- OpenSTA
- RePlace
- TritoCTS
- TritonSizer
- BSD-DME
- LeWiz Communications Ethernet MAC Core2 10G/5G/2.5G/1G
- LeWiz Communications, Inc. Ethernet MAC Core1 - Ethernet 1G/100M/10M
- 12nm RAIL library
- 65nm RAIL Library
- A framework for FPGA emulation of mixed-signal systems
- AXI Protocol Checker
- CoreIR Symbolic Analyzer
- Open-source FPGA Workflow
- FPGA-SPICE
- Tools regarding on analog modeling, validation, and generation
- OpenDP (Open Source Detailed Placement)
- University of Minnesota / Intel (Automated Analog Layout)
- gds2Para (Complete Integrated Circuit (IC) Layout Analysis from GDSII Design File to Parasitics Extraction)
- University of Utah (Logic Synthesis)
- JITX (Intent Driven Board Design)
- The EPFL Combinational Benchmark Suite
- Analog Known Good Designs
- Analog Parameter Search Engine
- Brown (Open Source PVT Sensors)
- Circuit IP Sanitizer
- Serial Link Mixed Signal Modeling
- UW-IDEA_AnalogTestCases
- System Verilog to Verilog
- Asynchronous Memory Compiler
- University of Michigan (Intent Driven Analog Design)
- Machine Generated Analog IC Layout
- Magical Test Circuits
- UW BSG Pipecleaner Suite
- OpenPiton Design Benchmark
- System Verilog to Verilog
- Utd-SystemVerilog
Programming Languages
Keywords
eda
10
vlsi
5
cad
4
verilog
4
vlsi-circuits
3
electronic-design-automation
3
tlm2
2
systemc
2
synthesis
2
qemu
2
co-simulation
2
fpga
2
spef
2
computer-aided-design
2
cpp17
2
design-automation
2
vlsi-physical-design
2
circuit-simulator
2
static-timing-analysis
2
asynchronous-vlsi
2
sta
2
circuit-simulation
1
circuit-analysis
1
vlsi-design
1
parallel-computing
1
solvers
1
parsers
1
vtr
1
vpr
1
routing
1
placement
1
vlsi-cad
1
prs
1
production-rules
1
language
1
hdl
1
hardware-description-language
1
dataflow-programming
1
dataflow
1
communicating-hardware-processes
1
chp
1
asynchronous-circuits
1
ieee
1
analog
1
formal-methods
1
formal-verification
1
hardware-verification
1
model-checking
1
satisfiability-modulo-theories
1
systemverilog
1