Ecosyste.ms: Awesome
An open API service indexing awesome lists of open source software.
https://github.com/calyxir/calyx
Intermediate Language (IL) for Hardware Accelerator Generators
compiler fpga-programming high-level-synthesis intermediate-language open-source-hardware
Last synced: 25 Jun 2024
https://github.com/cornell-zhang/HiSparse
High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
fpga-programming high-level-synthesis open-source-hardware sparse-linear-algebra
Last synced: 14 Jun 2024
https://github.com/HackerFoo/poprc
A Compiler for the Popr Language
compiler concatenative dependent-types functional high-level-synthesis language linear-logic logic-programming non-deterministic partial-evaluators popr popr-compiler supercompiler verilog
Last synced: 19 Apr 2024
https://google.github.io/xls/
XLS: Accelerated HW Synthesis
compiler high-level-synthesis hls mid-level-synthesis open-source pipeline verilog
Last synced: 17 Apr 2024
https://github.com/polyphony-dev/polyphony
Polyphony is Python based High-Level Synthesis compiler.
fpga high-level-synthesis python
Last synced: 17 Apr 2024
https://github.com/spcl/dace
DaCe - Data Centric Parallel Programming
cuda fpga high-level-synthesis high-performance-computing programming-language vivado-hls
Last synced: 28 Mar 2024
https://github.com/NNgen/nngen
NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
compiler deep-learning hardware high-level-synthesis neural-network onnx python pyverilog verilog-hdl veriloggen
Last synced: 22 Mar 2024
https://github.com/google/xls
XLS: Accelerated HW Synthesis
compiler high-level-synthesis hls mid-level-synthesis open-source pipeline verilog
Last synced: 21 Mar 2024
https://github.com/PyHDI/veriloggen
Veriloggen: A Mixed-Paradigm Hardware Construction Framework
compiler hardware hardware-construction-language high-level-synthesis python pyverilog verilog-hdl
Last synced: 21 Mar 2024
https://github.com/ferrandi/PandA-bambu
PandA-bambu public repository
c-to-verilog-vhdl fpga high-level-synthesis hls hw-accelerators
Last synced: 21 Mar 2024
https://github.com/JulianKemmerer/PipelineC
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
c fpga fpga-acceleration fpga-accelerators fpga-programming hardware hardware-description hardware-description-language high-level-synthesis hls open-source-hardware pipelines python vhdl
Last synced: 21 Mar 2024
