Ecosyste.ms: Awesome

https://github.com/perehinik/logic_analyzer_pcb

KiCad PCB project of Logic Analyzer

analizer fpga kicad usb

Last synced: 08 Nov 2024

https://github.com/perehinik/sdram_controller

Verilog SDR SDRAM controller for FPGA Xilinx and Lattice

fpga lattice sdram verilog xilinx

Last synced: 08 Nov 2024

https://github.com/perehinik/logic_analyzer_fpga_config

Vivado project for Xilinx Artix FPGA, used in logic analyzer

fpga verilog vivado xilinx

Last synced: 08 Nov 2024

https://github.com/perehinik/ftdi_ft2xx_fifo_terminal_python

Terminal for communication with FT IC in FIFO mode, tested with FT232H

fifo ft232h ftdi python terminal usb

Last synced: 08 Nov 2024

https://github.com/perehinik/logic_analyzer_user_interface

User interface for logic analyzer. Made on Python

analyzer interface logic python user

Last synced: 08 Nov 2024

https://github.com/perehinik/textolite

Text editor.

editor rich-text-editor text-editor

Last synced: 08 Nov 2024

https://github.com/perehinik/ftdi_ft2xx_fifo_terminal_c_sharp

Terminal for communication with FTDI IC in FIFO mode, tested with FT232H

csharp fifo ft232h ft2xx ftdi terminal

Last synced: 08 Nov 2024

https://github.com/perehinik/relay_tester_firmware

Stm32 project for relay tester, Project created in Stm32CubeIDE

cortex-m hal stm32 stm32cubeide

Last synced: 08 Nov 2024

https://github.com/perehinik/relay_tester_user_interface

User interface for relay tester, C#

csharp vcp visualstudio windowsforms

Last synced: 13 Oct 2024

https://github.com/perehinik/relay_tester_pcb

PCB project of relay tester, Altium Designer

pcb relay stm32 tester

Last synced: 08 Nov 2024

https://github.com/perehinik/vision_five_2_notes

Notes, scripts for VisionFive 2 RISC-V SBC.

Last synced: 08 Nov 2024

https://github.com/perehinik/rock_4_se_notes

Notes, scripts, etc for ROCK 4 SE SBC

Last synced: 08 Nov 2024