Projects in Awesome Lists by tommythorn

https://github.com/tommythorn/reduceron

FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including hardware garbage collection. Reduceron has been implemented on various FPGAs with clock frequency ranging from 60 to 150 MHz depending on the FPGA. A high degree of parallelism allows Reduceron to implement graph evaluation very efficiently. This fork aims to continue development on this, with a view to practical applications. Comments, questions, etc are welcome.

compiler fpga haskell lava verilog

Last synced: 16 Jan 2025

https://github.com/tommythorn/yarvi

Yet Another RISC-V Implementation

fpga fpga-soc risc-v riscv riscv32 verilog

Last synced: 16 Jan 2025

https://github.com/tommythorn/fpgammix

Partial implementation of Knuth's MMIX processor (FPGA softcore)

fpga fpga-soc fpga-softcore knuth-mmix-processor mmix

Last synced: 16 Jan 2025

https://github.com/tommythorn/yari

YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includes a complete SoC, simulator, GDB stub, scripts, and various examples.

fpga fpga-soc mips verilog

Last synced: 16 Jan 2025

https://github.com/tommythorn/paperlike-raspberry-pi-4

How to use a Dasung Paperlike HD-F, HD-FT, and Paperlike 253 with Raspberry Pi 4 [and other hosts?]

dasung eink raspberry-pi

Last synced: 16 Jan 2025

https://github.com/tommythorn/spleentt-5x8-font

Tiny 5x8 bitmap font based on spleen and creep, useful for low-resolution displays

bdf bitmap-font monospaced monospaced-font

Last synced: 16 Jan 2025

https://github.com/tommythorn/virtual-nascom

SDL-based Nascom 2 emulator

basic emulation emulator nascom retrocomputing sdl2 z80

Last synced: 16 Jan 2025

https://github.com/tommythorn/bemicro-cv

A "hello world" style designs for the Cyclone V based $49 Arrow BeMicro CV

bemicro-cv fpga

Last synced: 16 Jan 2025

https://github.com/tommythorn/verilator-demo

A very simple example of how to use Verilator

Last synced: 16 Jan 2025

https://github.com/tommythorn/ncl-examples

A collection of Null Convention Logic examples, simulated and synthesized for FPGA

Last synced: 16 Jan 2025

https://github.com/tommythorn/orangecrab_hello

Simple OrangeCrab Verilog design using LED and serial IO

Last synced: 16 Jan 2025

https://github.com/tommythorn/dirac-spec-errata

Bug-fixed version of the official specification of the Dirac wavelet based video codec

Last synced: 16 Jan 2025

https://github.com/tommythorn/expjit3

Proof of concept dynamic code generation

Last synced: 16 Jan 2025

https://github.com/tommythorn/kbe

Last synced: 16 Jan 2025

https://github.com/tommythorn/jsnascom

Nascom 2 emulator in the browser

emulation emulator nascom retrocomputing z80

Last synced: 16 Jan 2025

https://github.com/tommythorn/yarvi3

Last synced: 16 Jan 2025

https://github.com/tommythorn/lisp

A version of John McCarthy's tiny Lisp (in C) with added CDR-coding

Last synced: 16 Jan 2025

https://github.com/tommythorn/verilog-sim-bench

Verilog simulation workload extracted from Reduceron

Last synced: 16 Jan 2025

https://github.com/tommythorn/rust-verilog-cosim

Small example of how to co-simulate a Rust model against a Verilog implementation, using Verilator

Last synced: 16 Jan 2025

https://github.com/tommythorn/multisim

MultiSim is Yet Another CPU Simulator which purpose in life is to allow easy experimentation with various implementation strategies, such as superscalar in-order, sscalar out-of-order, speculative sscalar out-of-order, etc.

microarchitecture

Last synced: 16 Jan 2025