https://github.com/mikeroyal/risc-v-guide

RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-V hardware.

android-app computer-architecture cpu-profiling hypervisor optimize peripherals platformio processor processor-architecture risc-processor risc-v riscv riscv-emulator riscv64 rv32 sbc sel4 simulator tensoflow-lite virtualization

Last synced: 05 Apr 2025

https://github.com/mikeroyal/RISC-V-Guide

RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-V hardware.

android-app computer-architecture cpu-profiling hypervisor optimize peripherals platformio processor processor-architecture risc-processor risc-v riscv riscv-emulator riscv64 rv32 sbc sel4 simulator tensoflow-lite virtualization

Last synced: 14 Mar 2025

https://github.com/mrLSD/riscv-fs

F# RISC-V Instruction Set formal specification

cpu fs fsharp isa library risc-processor risc-v riscv riscv-emulator riscv-simulator riscv32 riscv64

Last synced: 21 Apr 2025

https://github.com/mrlsd/riscv-fs

F# RISC-V Instruction Set formal specification

cpu fs fsharp isa library risc-processor risc-v riscv riscv-emulator riscv-simulator riscv32 riscv64

Last synced: 04 Apr 2025

https://github.com/maikmerten/spu32

Small Processing Unit 32: A compact RV32I CPU written in Verilog

fpga ice40 icestorm risc-processor risc-v rv32i system-on-chip verilog

Last synced: 16 Oct 2025

https://github.com/suyashmahar/risc-processor

Simple single cycle RISC processor written in Verilog

assembler risc-processor

Last synced: 27 Jun 2025

https://github.com/wyvernsemi/riscv

Open source ISS and logic RISC-V 32 bit project

32-bit c-plus-plus co-simulation cpu-model embedded-systems fpga iss linux processor risc-processor risc-v soft-core verilog

Last synced: 14 Apr 2025

https://github.com/wyvernSemi/riscV

Open source ISS and logic RISC-V 32 bit project

32-bit c-plus-plus co-simulation cpu-model embedded-systems fpga iss linux processor risc-processor risc-v soft-core verilog

Last synced: 16 Mar 2025

https://github.com/alirezakay/risc-cpu

A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

cpu cpu-architecture cpu-model instruction-set-architecture isa mips-processor multi-cycle processor-architecture processor-design risc-processor vhdl vhdl-code vhdl-modules

Last synced: 03 Jan 2026

https://github.com/barrettotte/subarashii-cpu

A 16-bit RISC CPU inspired by MIPS. I designed this to learn more about computer architecture/organization.

cpu homebrew risc-processor verilog verilog-cpu

Last synced: 11 Apr 2025

https://github.com/wannabeog/csn-221-project

Implementation of a 24 bit RISC processor

pipeline-processor risc-processor verilog

Last synced: 01 Mar 2026

https://github.com/jofrfu/haw-v

Fork of a RISC-V compliant CPU, which originated in a project at the HAW Hamburg

assembly c fpga linux risc-processor risc-v vhdl vivado xilinx-fpga

Last synced: 12 Jun 2025

https://github.com/mrlsd/riscv-cpu

RISC-V five stage pipline CPU

cpu pipline risc-processor risc-v system-verilog

Last synced: 02 Mar 2026

https://github.com/xerpi/sisa-emu

SISA Architecture Emulator

c emulator emulator-programming lle risc risc-processor

Last synced: 16 Oct 2025

https://github.com/nanitefactory/elevator-with-atmega128

A small elevator control system that runs on ATMEL's 8-bit microcontroller.

atmega128 atmel atmel-avr atmel-avr-microcontroller atmel-studio c clang dot-matrix lcd led microcontroller push-button risc risc-processor seven-segments-display speaker stepper-motor switch

Last synced: 09 Apr 2025

https://github.com/gogolb/riscy-adventure

chisel3 risc-processor risc-v riscv32 scala

Last synced: 07 Oct 2025

https://github.com/0xHericles/riscv-helpmate

RISC-V32I Helpmate

hardware processor risc risc-processor risc-v tutorial

Last synced: 24 Mar 2025

https://github.com/markus-k/mini-risc

A minimal 16 bit RISC CPU written in VHDL

cpu fpga risc-processor vhdl

Last synced: 22 Feb 2026

https://github.com/harshalmittal4/24-bit-risc-processor

Computer Architecture-MIPS Processor simulation in verilog with self developed ISA

isa risc-processor verilog

Last synced: 19 Mar 2026

https://github.com/0xhericles/riscv-helpmate

RISC-V32I Helpmate

hardware processor risc risc-processor risc-v tutorial

Last synced: 23 Jun 2025

https://github.com/sskender/ferrisc

RISC ARM7 Assembly

armv7 assembly fer processor processor-architecture processor-simulator processors risc risc-arm7-assembly risc-processor

Last synced: 22 Mar 2025

https://github.com/nikolapeja6/ss-proj

School project for the SS (Sistemski Softver, en. System Software) course of my Bachelor's studies at the School of Electrical Engineering, University of Belgrade.

assembly-language interpretive-emulator risc-processor school-project two-pass-assembler

Last synced: 18 Apr 2026

https://github.com/skpro-glitch/shorthand-risc

This is a simplified assembly language with a tabular structured instruction set. This is meant for easy learning and fast implementation of assembly languages in microprocessors and microcontrollers. - Soham Kapur, VIT Chennai

assembler assembly assembly-language assembly-language-programming compiler compiler-construction compiler-design compiler-optimization compiler-principles compilers risc risc-processor risc-v riscv shorthand shorthand-notation shorthand-syntax

Last synced: 03 Feb 2026