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Projects in Awesome Lists tagged with xilinx-fpga
A curated list of projects in awesome lists tagged with xilinx-fpga .
https://github.com/f4pga/f4pga-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
architecture-definitions artix artix7 documentation fpga hdl ice40 kintex7 lattice primitives python sphinx symbiflow synthesis toolchain verilog verilog-simulations verilog-simulator vpr xilinx-fpga
Last synced: 09 Nov 2024
https://github.com/fpgasystems/Coyote
Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.
amd fpga gpu hbm rdma service tcp virtualization xilinx-fpga
Last synced: 09 Nov 2024
https://github.com/ingonyama-zk/blaze
blaze is a Rust library for ZK acceleration on Xilinx FPGAs.
aws fpga hardware xilinx-fpga zero-knowledge
Last synced: 22 Dec 2024
https://github.com/trisycl/sycl
SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
accelerators clang cpp20 dpc-toolchain llvm oneapi-dpc sycl sycl-compilation trisycl xilinx-fpga xilinx-vitis
Last synced: 16 Dec 2024
https://github.com/derekmulcahy/xvcpi
Xilinx Virtual Cable Server for Raspberry Pi
jtag snickerdoodle xilinx-fpga xilinx-vivado zynq
Last synced: 09 Nov 2024
https://github.com/ultraembedded/openlogicbit
Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.
altera-fpga digital-signal-analyzer fpga ftdi2232h ftdi232h lattice-fpga logic-analyzer verilog xilinx-fpga
Last synced: 12 Nov 2024
https://github.com/chipsalliance/yosys-f4pga-plugins
Plugins for Yosys developed as part of the F4PGA project.
eda f4pga fpga toolchain xilinx xilinx-fpga yosys yosys-plugin
Last synced: 05 Nov 2024
https://github.com/ultraembedded/core_ft60x_axi
FTDI FT600 SuperSpeed USB3.0 to AXI bus master
axi4 bus-master data-acquisition fpga ft600 ftdi-devices usb3 verilog xilinx-fpga
Last synced: 12 Nov 2024
https://github.com/ultraembedded/core_dvi_framebuffer
Minimal DVI / HDMI Framebuffer
axi4 dvi fpga framebuffer hdmi verilog video xilinx-fpga
Last synced: 12 Nov 2024
https://github.com/hex-five/multizone-iot-sdk
MultiZone® Trusted Firmware is the quick and safe way to build secure IoT applications with any RISC-V processor. It provides secure access to commercial and private IoT clouds, real-time monitoring, secure boot, and remote firmware updates. The built-in Trusted Execution Environment provides hardware-enforced separation ...
attestation digilent-arty-board embedded-systems firmware freertos iot lwip mbedtls mqtt multizone ota-firmware-updates risc-v root-of-trust secure-boot tcp-ip tee tls trusted-execution-environment trustzone xilinx-fpga
Last synced: 09 Nov 2024
https://github.com/salvatorebarone/cnn-vhdl
A library of VHDL components for Neural Networks
approximate-algorithms approximate-computing approximation artificial-intelligence artificial-neural-networks convolutional-neural-networks ghdl lenet-5 vhdl virtex xilinx-fpga
Last synced: 18 Oct 2024
https://github.com/ingonyama-zk/open-binius
building blocks for accelerating ZK proofs over binary fields
cryptography fpga hardware xilinx-fpga zero-knowledge
Last synced: 14 Nov 2024
https://github.com/geraked/verilog-rle
Verilog Implementation of Run Length Encoding for RGB Image Compression
compression-algorithm computer-engineering fpga fpga-programming geraked image-compression image-processing ise matlab rabist rle rle-compression-algorithm run-length-encoding student-project verilog verilog-code verilog-hdl xilinx xilinx-fpga yazd-university
Last synced: 09 Nov 2024
https://github.com/wissance/quickspi
Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface
altera axi axi-interfaces bit-oriented-spi dragster-spi fpga hard-spi soft-spi spi spi-fpga spi-hdl spi-interface spi-ip-core spi-pld verilog-components verilog-hdl verilog-snippets verilog-spi xilinx-fpga xilinx-vivado
Last synced: 17 Dec 2024
https://github.com/mcedrdiego/Kria_yolov3_ppe
Xilinx Kria KV260 Real-time PPE detection
fpga kria-som kv260 real-time xilinx-fpga yolov3
Last synced: 09 Nov 2024
https://github.com/wissance/2dimageprocessing
2d Images processing system with FPGA (Zynq 7k) from two dragster linescanner (DR-2k-7)
2d 2d-scaner awaiba cmosis computer-vision dr-2k-7 dragster fpga frequency-analysis frequency-measurment image-processing optical optical-mark-recognition optical-measurements optical-sensors optical-system optics verilog xilinx-fpga xilinx-vivado
Last synced: 17 Dec 2024
https://github.com/wissance/imagecapturesystem
A Xilinx IP Core and App for line scanner image capture and store
awaiba axi-quad-spi axi-vdma capture-the-flag cmosis computer-vision dr-2k-7 dragster image linescanners scanner spi two-channel-image-capture-system video video-ip-core xilinx-axi-vdma xilinx-fpga xilinx-ip xilinx-vivado
Last synced: 17 Dec 2024
https://github.com/jmduarte/hls_hls4ml_tutorial
HLS & hls4ml Tutorial
fpga fpga-firmware fpga-programming high-energy-physics high-level-synthesis hls hls4ml machine-learning particle-physics vitis vivado vivado-hls xilinx xilinx-fpga
Last synced: 02 Dec 2024
https://github.com/charkster/spi_slave_verilog
SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs
Last synced: 14 Nov 2024
https://github.com/izyasoft/easyhdllib
A coocbook of HDL (primarily Verilog) modules
altera clock-divider fifo fpga frequencies frequency-analysis hdl verilog verilog-components verilog-hdl verilog-library verilog-snippets xilinx-fpga
Last synced: 20 Dec 2024
https://github.com/islandcontroller/arduinoxvc
Xilinx Virtual Cable (XVC) Server implementation for use with an Arduino UNO/Leonardo
arduino jtag xilinx-fpga xilinx-ise xilinx-virtual-cable
Last synced: 16 Nov 2024
https://github.com/jeffdecola/control-fpga-via-raspi-and-webserver
Control a FPGA via a Raspberry Pi and a Webserver.
arty-s7 fpga go golang gpio pmod raspberry-pi raspi verilog webserver xilinx-fpga xilinx-vivado
Last synced: 25 Oct 2024
https://github.com/kampi/tinyavr
VHDL design of an AVR8 CPU.
avr cpu fpga mcu vhdl xilinx xilinx-fpga xilinx-vivado
Last synced: 20 Nov 2024
https://github.com/jofrfu/haw-v
Fork of a RISC-V compliant CPU, which originated in a project at the HAW Hamburg
assembly c fpga linux risc-processor risc-v vhdl vivado xilinx-fpga
Last synced: 13 Nov 2024
https://github.com/charkster/cmod_a7_spi_sram
SPI slave to External SRAM interface for Cmod A7
cmod-a7 digilent spi spi-slave sram xilinx-fpga
Last synced: 14 Nov 2024
https://github.com/ashvnv/fpga-ping-pong-game
Simple Ping Pong game on Xilinx Spartan 3E
fpga-game fpga-projects spartan3-fpga spartan3e xilinx-fpga xilinx-ise
Last synced: 26 Nov 2024
https://github.com/aryan-programmer/axi_gen_and_sum_primes_fpga
A Vitis & Vivado project (for the Basys3 board (Atrix-7 FPGA)) that generates primes and sums them up over an AXI memory interface.
artix artix-7 axi axi-lite axi-memory-mapped axi-stream basys3 embedded fpga hls vitis vitis-hls vivado vivado-ip-integrator vivado-vitis xilinx xilinx-fpga xilinx-hls xilinx-vitis xilinx-vivado
Last synced: 16 Nov 2024
https://github.com/dpbm/faculdade
Meus programas que fiz durante o curso de ciencias da computacao
c c-lang ciencias-da-computacao clojure computer-science faculdade hardware haskell html programacao programas projetos python python-3 python-projects software tecnologia xilinx-fpga xilinx-projects
Last synced: 18 Nov 2024
https://github.com/monsij/ec-circuits
Shaped by Kiel c51
embedded-c kiel proteus verilog-hdl xilinx-fpga
Last synced: 03 Dec 2024
https://github.com/kampi/ov7670
FPGA interface and driver for an OV7670 camera sensor
fpga fpga-soc imageprocessing ov7670 vhdl xilinx-fpga
Last synced: 20 Nov 2024
https://github.com/bucknalla/ad9361_zycap
PL Layer Controls for the AD9361 RF Front End
ad9361 fmcomms3 xilinx-fpga zedboard
Last synced: 11 Nov 2024
https://github.com/slatyo/sonartracking
Small project to track things with a waterproof sonar sensor
adc arduino dac ds18b20 echo esp esp12f esp8266 fpga fpga-board fpga-programming jsn-sr04t oled-display-ssd1306 sonar tr-89b ultrasonic ultrasonic-distance-sensors vhdl xilinx-fpga xilinx-ise
Last synced: 20 Dec 2024
https://github.com/sped0n/dds_njust
南理工数字系统综合实验实验代码/实验报告
artix-7 njust xc7a35t xilinx-fpga xilinx-vivado xillinx
Last synced: 06 Nov 2024
https://github.com/charkster/cmod_a7_pattern_generator_v1
digilent gpio pattern spi xilinx-fpga
Last synced: 14 Nov 2024
https://github.com/ematech/zynq_book_pynq-z1
Zynq Book Tutorials adapted for the Digilent PYNQ-Z1
digilent digilent-pynq-z1 fpga pynq pynq-z1 xilinx xilinx-fpga xilinx-vivado xilinx-zynq zynq zynq-7000 zynq-7020 zynq-book zynq-example-project
Last synced: 08 Nov 2024
https://github.com/kpf5297/basys3
VHDL Learnings
artix-7 vhdl xilinx-fpga xilinx-vivado
Last synced: 06 Nov 2024
https://github.com/maxq22/vhdl
Just a random compilation of some VHDL code
dabble digital double filter finite fir fpga impulse response signal signal-processing vhdl xilinx xilinx-fpga xilinx-vivado
Last synced: 21 Nov 2024
https://github.com/kampi/vhdl
Some VHDL projects, created with and for my ZYBO.
fpga vhdl vivado xilinx-fpga zybo
Last synced: 20 Nov 2024