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Projects in Awesome Lists tagged with mips-processor

A curated list of projects in awesome lists tagged with mips-processor .

https://github.com/alirezakay/risc-cpu

A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

cpu cpu-architecture cpu-model instruction-set-architecture isa mips-processor multi-cycle processor-architecture processor-design risc-processor vhdl vhdl-code vhdl-modules

Last synced: 03 Jan 2026

https://github.com/edoardottt/asm-snippets

Some of my assembly code (examples, iterative and recursive algorithms) from Computer's Architecture course in Sapienza University, CS Bachelor's Degree :floppy_disk:

algorithms asm asm-mars assembler assembly assembly-language assembly-language-programming assembly-x86 assemblyscript computer-hardware cpu mips mips-architecture mips-assembly mips-processor parallelism processor recursive-algorithms storage

Last synced: 23 Mar 2025

https://github.com/yasnakateb/pipelinedmips

🔮 A 16-bit MIPS Processor Implementation in Verilog HDL

cpu icarus-verilog iverilog mips mips-pipeline mips-processor pipeline verilog verilog-hdl

Last synced: 14 Feb 2026

https://github.com/yasnakateb/mipsprocessor

🔮 A 32-bit MIPS Processor Implementation in Verilog HDL

cpu mips-processor multicycle xilinx

Last synced: 03 Feb 2026

https://github.com/liu42/processor

《计算机组成原理》课程设计,基于 MIPS 的流水线 CPU 系统设计。

architecture computer-architecture course-project cpu fpga homework-project mips mips-architecture mips-processor pipeline verilog

Last synced: 27 Feb 2026

https://github.com/LIU42/Processor

《计算机组成原理》课程设计,基于 MIPS 系统的流水线 CPU 设计

architecture computer-architecture course-project cpu fpga homework-project mips mips-architecture mips-processor pipeline verilog

Last synced: 15 Jul 2025

https://github.com/hugech38/mips

🐢 用 Verilog 实现的单周期 MIPS 指令集的 CPU,并用它来计算斐波那契数。

cpu mips mips-architecture mips-instructions mips-processor verilog vhdl

Last synced: 14 Mar 2025

https://github.com/guntas-13/mips-processor-basys3

Full FPGA Implementation of 32-bit FSM-based Multi-State MIPS Processor

mips-assembly mips-processor processor-architecture verilog

Last synced: 06 Jan 2026

https://github.com/balos1/mips_single_cycle

This is project is a MIPS Single-Cycle processor with a cache for data memory.

computer-architecture mips-processor single-cycle

Last synced: 19 Mar 2026

https://github.com/david-palma/mips-32bit-encoder

C implementation of a 32-bit assembly instruction encoder for MIPS processors, designed to convert MIPS assembly instructions into their corresponding machine code formats for execution on MIPS-based systems.

assembly assembly-to-machine c c-programming computer-architecture instruction-set-architecture instuctions-encoder isa machine-code mips-architecture mips-instructions mips-processor

Last synced: 26 Mar 2025

https://github.com/mostafaelhoushi/mips-q

VHDL model, assembler, and C/C++ compiler for MIPS-Q: a MIPS processor with a quantum processing module.

assembler mips mips-processor quantum-computing quantum-processing vhdl-model

Last synced: 28 Mar 2025